A baseboard management controller (BMC) usually communicates with a processor in a host device via a management interface (e.g., an intelligent platform management interface (IPMI)), wherein this IPMI is for example a keyboard control style (KCS), an I2C-based intelligent platform management bus (IPMB), a Local Area Network (LAN)-based IPMB, a peripheral component interconnection (PCI), etc., among which the KCS interface enables the BMC to be directly connected with the processor, thereby the KCS interface is a most appropriate management interface. In the existing systems, the KCS interface between the BMC and the processor is generally carried out via a single low pin counter (LPC) bus.
Generally, a processor can communicate with a BMC via an IPMI to collect information about a temperature sensor and a system cooling state and so on. However, for the processor and the BMC, the existing IMPI specifications cannot detect the IPMI communication states of the system. For example, when both the processor and the BMC can work normally while the KCS interface fails, the IPMI specifications do not provide methods about how to detect and treat such failure.
In the existing systems, when an IPMI-based communication manner fails, the communication between the processor and the BMC is usually recovered by channel resetting or power re-starting. However, because the IPMI communication has been interrupted, it is possible that the processor cannot transmit a command for channel resetting or power re-starting to the BMC. In addition, in the existing systems, the BMC cannot request relevant services from the processor, and when the IPMI communication fails, the processor cannot obtain BMC-related log in time. Therefore, the existing approaches for power re-starting increase the downtime of the system and seriously affects the stability of the system and the user experience.